Issued Patents 2002
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6498357 | Lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process | Chyh-Yih Chang, Tien-Hao Tang | 2002-12-24 |
| 6465848 | Low-voltage-triggered electrostatic discharge protection device and relevant circuitry | Geeng-Lih Lin | 2002-10-15 |
| 6465768 | MOS structure with improved substrate-triggered effect for on-chip ESD protection | Tung-Yang Chen, Tien-Hao Tang | 2002-10-15 |
| 6465283 | Structure and fabrication method using latch-up implantation for improving latch-up immunity in CMOS fabrication process | Chyh-Yih Chang, Hsin-Chin Jiang, Jeng-Jie Peng | 2002-10-15 |
| 6448641 | Low-capacitance bonding pad for semiconductor device | Hsin-Chin Jiang | 2002-09-10 |
| 6444295 | Method for improving integrated circuits bonding firmness | Jeng-Jie Peng, Nien-Ming Wang | 2002-09-03 |
| 6444404 | Method of fabricating ESD protection device by using the same photolithographic mask for both the ESD implantation and the silicide blocking regions | Tung-Yang Chen, Hun-Hsien Chang | 2002-09-03 |
| 6437407 | Charged device model electrostatic discharge protection for integrated circuits | Chyh-Yih Chang | 2002-08-20 |
| 6420774 | Low junction capacitance semiconductor structure and I/O buffer | Geeng-Lih Lin | 2002-07-16 |
| 6392860 | Electrostatic discharge protection circuit with gate-modulated field-oxide device | Geeng-Lih Lin | 2002-05-21 |
| 6388850 | Gate-coupled ESD protection circuit without transient leakage | Chen-Chia Wang, Hun-Hsien Chang | 2002-05-14 |
| 6355960 | ESD protection for open drain I/O pad in integrated circuit with parasitic field FET devices | Geeng-Lih Lin | 2002-03-12 |
| 6335698 | Programmable analog-to-digital converter with programmable non-volatile memory cells | Hsin-Chin Jiang | 2002-01-01 |