Issued Patents 2002
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6490708 | Method of integrated circuit design by selection of noise tolerant gates | John M. Cohn, Scott Whitney Gould, Jose L. Neves, William F. Smith, Larry Wissel +1 more | 2002-12-03 |
| 6477686 | Method of calculating 3-dimensional fringe characteristics using specially formed extension shapes | L. William Dewey, III | 2002-11-05 |
| 6473887 | Inclusion of global wires in capacitance extraction | L. William Dewey, III, Edward W. Seibert | 2002-10-29 |
| 6460167 | Efficient system for multi-level shape interactions | L. William Dewey, III | 2002-10-01 |
| 6430729 | Process and system for maintaining 3 sigma process tolerance for parasitic extraction with on-the-fly biasing | L. William Dewey, III, Judith H. McCullen, Edward W. Seibert | 2002-08-06 |