Issued Patents 2002
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6490653 | Method and system for optimally issuing dependent instructions based on speculative L2 cache hit in a data processing system | Robert Alan Cargnoni, Bruce Joseph Ronchetti, David Shippy | 2002-12-03 |
| 6477635 | Data processing system including load/store unit having a real address tag array and method for correcting effective address aliasing | James Allan Kahle, George McNeil Lattimore, Jose Angel Paredes | 2002-11-05 |
| 6463511 | System and method for high performance execution of locked memory instructions in a system with distributed memory and a restrictive memory model | Bryan Boatright, Rajesh Patel | 2002-10-08 |
| 6425069 | Optimization of instruction stream execution that includes a VLIW dispatch group | John Edward Derrick | 2002-07-23 |
| 6338128 | System and method for invalidating an entry in a translation unit | Albert Chang, Edward John Silha, Gus Yeung | 2002-01-08 |
| 6336168 | System and method for merging multiple outstanding load miss instructions | Marlin Wayne Frederick, Jr., Bruce Joseph Ronchetti, David Shippy | 2002-01-01 |
| 6336183 | System and method for executing store instructions | Hung Q. Le, Robert G. McDonald, David Shippy | 2002-01-01 |