Issued Patents 2002
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6460169 | Routing program method for positioning unit pins in a hierarchically designed VLSI chip | Peter J. Camporese, Howard H. Smith | 2002-10-01 |
| 6418401 | Efficient method for modeling three-dimensional interconnect structures for frequency-dependent crosstalk simulation | Alina Deutsch, Gerard V. Kopcsay, Phillip J. Restle, Howard H. Smith | 2002-07-09 |
| 6415428 | Minimal length method for positioning unit pins in a hierarchically designed VLSI chip | Peter J. Camporese, Howard H. Smith | 2002-07-02 |
| 6374394 | Method to identify unit pins that are not optimally positioned in a hierarchically designed VLSI chip | Peter J. Camporese, Howard H. Smith | 2002-04-16 |
| 6342823 | System and method for reducing calculation complexity of lossy, frequency-dependent transmission-line computation | Alina Deutsch, Gerard V. Kopcsay, Phillip J. Restle, Howard H. Smith | 2002-01-29 |