Issued Patents 2002
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6445645 | Random access memory having independent read port and write port and process for writing to and reading from the same | Mathew R. Arcoleo, Cathal G. Phelan, Simon J. Lovett | 2002-09-03 |
| 6388927 | Direct bit line-bit line defect detection test mode for SRAM | Jonathan F. Churchill, Jeffrey F. Kooiman, Cathal G. Phelan, Gary A. Gibbs | 2002-05-14 |
| 6385128 | Random access memory having a read/write address bus and process for writing to and reading from the same | Mathew R. Arcoleo, Cathal G. Phelan, Simon J. Lovett | 2002-05-07 |
| 6380762 | Multi-level programmable voltage control and output buffer with selectable operating voltage | Gary A. Gibbs | 2002-04-30 |
| 6359316 | Method and apparatus to prevent latch-up in CMOS devices | Peter Voss, Andrew J. Walker, Jeff Watt, Cathal G. Phelan, Patrick Zicolello +1 more | 2002-03-19 |