KB

Krishna Belkhale

CS Cadence Design Systems: 1 patents #6 of 34Top 20%
📍 Saratoga, CA: #159 of 356 inventorsTop 45%
🗺 California: #8,284 of 26,763 inventorsTop 35%
Overall (2002): #171,231 of 266,432Top 65%
1
Patents 2002

Issued Patents 2002

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6401231 Method and apparatus for performing both negative and positive slack time budgeting and for determining a definite required constraint during integrated circuit design Johnson Limqueco 2002-06-04