Issued Patents 2002
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6489806 | Zero-power logic cell for use in programmable logic devices | Fabiano Fontana | 2002-12-03 |
| 6472308 | Borderless vias on bottom metal | — | 2002-10-29 |
| 6455593 | Method of dynamic retardation of cell cycle kinetics to potentiate cell damage | Philip M. Grimley | 2002-09-24 |
| 6455375 | Eeprom tunnel window for program injection via P+ contacted inversion | Chun Jiang, Robert H. Tu | 2002-09-24 |
| 6455912 | Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress | Hyeon-Seag Kim | 2002-09-24 |
| 6424000 | Floating gate memory apparatus and method for selected programming thereof | — | 2002-07-23 |
| 6424003 | EEPROM cell with self-aligned tunneling window | Xiao-Yu Li, Christopher O. Schmidt | 2002-07-23 |
| 6362527 | Borderless vias on bottom metal | — | 2002-03-26 |