Issued Patents 2002
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6457117 | Processor configured to predecode relative control transfer instructions and replace displacements therein with a target address | — | 2002-09-24 |
| 6446181 | System having a configurable cache/SRAM memory | Hebbalalu S. Ramagopal, Michael S. Allen, Moinul Syed, Ravi Kolagotla, Lawrence A. Booth, Jr. +1 more | 2002-09-03 |
| 6404324 | Resistive component for use with short duration, high-magnitude currents | Scott E. Crawford | 2002-06-11 |
| 6393549 | Instruction alignment unit for routing variable byte-length instructions | Thang M. Tran | 2002-05-21 |
| 6393546 | Physical rename register for efficiently storing floating point, integer, condition code, and multimedia values | James B. Keller | 2002-05-21 |
| 6381689 | Line-oriented reorder buffer configured to selectively store a memory operation result in one of the plurality of reorder buffer storage locations corresponding to the executed instruction | Thang M. Tran | 2002-04-30 |
| 6367001 | Processor including efficient fetch mechanism for L0 and L1 caches | — | 2002-04-02 |
| 6347369 | Method and circuit for single cycle multiple branch history table access | — | 2002-02-12 |