Issued Patents 1989
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4884270 | Easily cascadable and testable cache memory | Roland H. Pang | 1989-11-28 |
| 4860262 | Cache memory reset responsive to change in main memory | — | 1989-08-22 |
| 4858182 | High speed zero power reset circuit for CMOS memory cells | Roland H. Pang | 1989-08-15 |
| 4837743 | Architecture for memory multiplexing | Jy-Der David Tai, Te-Chuan Hsu | 1989-06-06 |
| 4831625 | Easily cascadable and testable cache memory | Roland H. Pang | 1989-05-16 |
| 4815039 | Fast real-time arbiter | Jy-Der David Tai | 1989-03-21 |