Issued Patents 1989
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4878996 | Method for reduction of filaments between electrodes | Howard L. Tigelaar, Shaym G. Garg, Kalipatnam Vivek Rao | 1989-11-07 |
| 4853895 | EEPROM including programming electrode extending through the control gate electrode | Bert R. Riemenschneider | 1989-08-01 |
| 4839705 | X-cell EEPROM array | Howard L. Tigelaar, Bert R. Riemenschneider, James L. Paterson | 1989-06-13 |
| 4833514 | Planar FAMOS transistor with sealed floating gate and DCS+N.sub.2 O oxide | Agerico L. Esquivel | 1989-05-23 |
| 4829019 | Method for increasing source/drain to channel stop breakdown and decrease P+/N+ encroachment | Howard L. Tigelaar, Bert R. Riemenschneider | 1989-05-09 |
| 4806201 | Use of sidewall oxide to reduce filaments | Howard L. Tigelaar, Shaym G. Garg, Kalipatnam Vivek Rao | 1989-02-21 |
| 4799992 | Interlevel dielectric fabrication process | Kalipatnam Vivek Rao, James L. Paterson | 1989-01-24 |