Issued Patents 1989
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4876213 | Salicided source/drain structure | — | 1989-10-24 |
| 4852062 | EPROM device using asymmetrical transistor characteristics | Frank K. Baker, Jr., Charles Frederick Hart | 1989-07-25 |
| 4847213 | Process for providing isolation between CMOS devices | — | 1989-07-11 |
| 4837173 | N-channel MOS transistors having source/drain regions with germanium | John R. Alvis, Orin W. Holland | 1989-06-06 |
| 4835589 | Ram cell having trench sidewall load | — | 1989-05-30 |
| 4835112 | CMOS salicide process using germanium implantation | John R. Yeargain | 1989-05-30 |
| 4812418 | Micron and submicron patterning without using a lithographic mask having submicron dimensions | Louis C. Parrillo, J. William Dockrey | 1989-03-14 |
| 4811066 | Compact multi-state ROM cell | Frank K. Baker, Jr. | 1989-03-07 |